/* Low-power Voice Process
 * Copyright (C) 2001-2020 NationalChip Co., Ltd
 * ALL RIGHTS RESERVED!
 *
 * soc_config.h:
 *
 */

#ifndef __SOC_CONFIG_H__
#define __SOC_CONFIG_H__

#include <autoconf.h>
#include <base_addr.h>
#include <lib/sizes.h>

/*
 * Memory configurations
 */
#define CONFIG_SET_MEM_PARAM

// Sram total size
#define CONFIG_NPU_SRAM_SIZE       (CONFIG_NPU_SRAM_SIZE_KB * 1024)

#define CONFIG_AUDIO_OUT_BUFFER_SIZE      (CONFIG_AUDIO_OUT_BUFFER_SIZE_KB * 1024)

#ifdef CONFIG_DL
# define CONFIG_MCU_SRAM_SIZE       (0x30000 - CONFIG_NPU_SRAM_SIZE - CONFIG_AUDIO_OUT_BUFFER_SIZE - CONFIG_DL_SIZE)
#else
# define CONFIG_MCU_SRAM_SIZE       (0x30000 - CONFIG_NPU_SRAM_SIZE - CONFIG_AUDIO_OUT_BUFFER_SIZE)
#endif
#define CONFIG_AUDIO_IN_SRAM_SIZE  0x4000

#define CONFIG_TOTAL_SRAM_SIZE     (0x20000/*npu*/ + 0x10000/*mcu*/ + 0x4000/*audio in*/)

// Dynamic Program Load
#ifdef CONFIG_DL
# define CONFIG_DL_SIZE             (CONFIG_PAGEFRAME_NR * SZ_4K)
/* DL 基地址 */
# define CONFIG_DL_BASE             (0x10000000 + CONFIG_NPU_SRAM_SIZE + CONFIG_MCU_SRAM_SIZE)
#else
# define CONFIG_DL_SIZE             0
# define CONFIG_DL_BASE             0
#endif

// Stage1 size
#define CONFIG_STAGE1_SRAM_SIZE    0x3000
#define CONFIG_STAGE1_IRAM_SIZE    0x3000
#define CONFIG_STAGE1_DRAM_SIZE    0x3000

// Stage2 size
#define CONFIG_STAGE2_SRAM_SIZE    CONFIG_MCU_SRAM_SIZE
#define CONFIG_STAGE2_IRAM_SIZE    CONFIG_STAGE2_SRAM_SIZE
#define CONFIG_STAGE2_DRAM_SIZE    CONFIG_STAGE2_SRAM_SIZE
#define CONFIG_STAGE2_XIP_SIZE     0x100000 // 1M flash for .stage2_text segment

// Stage1 addr
#define CONFIG_STAGE1_IRAM_BASE    0x10000000
#define CONFIG_STAGE1_DRAM_BASE    0x20000000

// Stage2 addr
#define CONFIG_STAGE2_IRAM_BASE    (CONFIG_STAGE1_IRAM_BASE + CONFIG_NPU_SRAM_SIZE)
#define CONFIG_STAGE2_XIP_BASE     (CONFIG_FLASH_XIP_BASE + CONFIG_STAGE1_IRAM_SIZE)
#define CONFIG_STAGE2_DRAM_BASE    (CONFIG_STAGE1_DRAM_BASE + CONFIG_NPU_SRAM_SIZE)
#define CONFIG_DL_PAGEFRAME_BASE   (CONFIG_STAGE1_DRAM_BASE + CONFIG_NPU_SRAM_SIZE + CONFIG_MCU_SRAM_SIZE)

#define CONFIG_AUDIOIN_DRAM_BASE    0x20030000

// Dynamic Program Load
#ifdef CONFIG_DL
#define CONFIG_EXTERNAL_FLASH_SZIE SZ_512K
#endif

#define CONFIG_ALL_BIN_SIZE        (CONFIG_STAGE1_SRAM_SIZE + CONFIG_STAGE2_SRAM_SIZE)
#define CONFIG_DRAM_BASE           0x50000000

#define CONFIG_SYS_MALLOC_BASE     (CONFIG_STAGE2_DRAM_BASE + CONFIG_STAGE2_DRAM_SIZE)

#ifdef CONFIG_BOOT_TOOL
#define CONFIG_SRAM_RESERVR_SIZE   0x0
#else
#define CONFIG_SRAM_RESERVR_SIZE   0x0
#endif
#define CONFIG_SYS_MALLOC_LEN      (CONFIG_MCU_SRAM_SIZE - CONFIG_STAGE2_DRAM_SIZE - CONFIG_SRAM_RESERVR_SIZE)

#define CONFIG_STAGE1_STACK        (CONFIG_STAGE1_DRAM_BASE + CONFIG_STAGE1_DRAM_SIZE - 4)
#define CONFIG_STAGE2_STACK        (CONFIG_STAGE2_DRAM_BASE + CONFIG_STAGE2_DRAM_SIZE - 4)


#endif /* __SOC_CONFIG_H__ */
